53 lines
1.8 KiB
Plaintext
53 lines
1.8 KiB
Plaintext
16 ADBUS0 TXD D0 D0 TCK/SK
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17 ADBUS1 RXD D1 D1 TDI/DO
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18 ADBUS2 RTS# D2 D2 TDO/DI
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19 ADBUS3 CTS# D3 D3 TMS/CS
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21 ADBUS4 DTR# D4 D4 GPIOL0
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22 ADBUS5 DSR# D5 D5 GPIOL1
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23 ADBUS6 DCD# D6 D6 GPIOL2
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24 ADBUS7 RI#/ TXDEN* D7 D7 GPIOL3
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26 BDBUS0 TXD D0 D0 TCK/SK
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27 BDBUS1 RXD D1 D1 TDI/DO
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28 BDBUS2 RTS# D2 D2 TDO/DI
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29 BDBUS3 CTS# D3 D3 TMS/CS
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30 BDBUS4 DTR# D4 D4 GPIOL0
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32 BDBUS5 DSR# D5 D5 GPIOL1
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33 BDBUS6 DCD# D6 D6 GPIOL2
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34 BDBUS7 RI#/ TXDEN* D7 D7 GPIOL3
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38 CDBUS0 TXD D0 D0 RS232 or Bit-Bang
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39 CDBUS1 RXD D1 D1 RS232 or Bit-Bang
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40 CDBUS2 RTS# D2 D2 RS232 or Bit-Bang
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41 CDBUS3 CTS# D3 D3 RS232 or Bit-Bang
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43 CDBUS4 DTR# D4 D4 RS232 or Bit-Bang
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44 CDBUS5 DSR# D5 D5 RS232 or Bit-Bang
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45 CDBUS6 DCD# D6 D6 RS232 or Bit-Bang
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46 CDBUS7 RI#/ TXDEN* D7 D7 RS232 or Bit-Bang
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48 DDBUS0 TXD D0 D0 RS232 or Bit-Bang
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52 DDBUS1 RXD D1 D1 RS232 or Bit-Bang
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53 DDBUS2 RTS# D2 D2 RS232 or Bit-Bang
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54 DDBUS3 CTS# D3 D3 RS232 or Bit-Bang
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55 DDBUS4 DTR# D4 D4 RS232 or Bit-Bang
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57 DDBUS5 DSR# D5 D5 RS232 or Bit-Bang
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58 DDBUS6 DCD# D6 D6 RS232 or Bit-Bang
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59 DDBUS7 RI#/ TXDEN* D7 D7 RS232 or Bit-Bang
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12,37,64 VCORE POWER
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20,31,42,56 VCCIO POWER
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9 VPLL POWER
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4 VPHY POWER
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50 VREGIN POWER
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49 VREGOUT POWER
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10 AGND POWER
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1,5,11,15,25,35,47,51 GND POWER
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2 OSCI INPUT Oscillator input.
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3 OSCO OUTPU
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6 REF INPUT Current reference – connect via a 12K Ohm resistor @ 1% to GND.
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7 DM I/O USB Data Signal Minus.
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8 DP I/O USB Data Signal Plus.
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13 TEST INPUT IC test pin – for normal operation should be connected to GND.
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14 RESET# INPUT Reset input (active low).
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60 PWREN# OUTPU
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36 SUSPEND# OUTPU
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63 EECS I/O EEPROM – Chip Select. Tri-State during device reset.
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62 EECLK OUTPUT Clock signal to EEPROM. Tri-State during device reset. When not in
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61 EEDATA I/O EEPROM – Data I/O Connect directly to Data-In of the EEPROM and to
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