asm-test/shift3.asm.in

80 lines
1.7 KiB
NASM

; -*-asm-*-
include(`common.m4')
BRA r :reset ; RESB
BRA r :irq ; IRQB
irq: RTI s
;; reset stack
reset: SEI i
LDX # ff
TXS i
;; CS high, SCLK low
LDA # hh(M_CS)
STA a PORTA
LDA # hh(M_DDRA_MASK)
STA a DDRA
LDX # hh(M_CFGH|M_CFGH_FENB)
LDY # hh(M_CFGL_BAUD_115200)
JSR a :spi16
;; read data
tryagain: LDX # hh(M_R_DATA)
LDY # hh(M_R_DATA)
JSR a :spi16
LDA zp 4
BPL r :tryagain ; BPL = if the leftmost bit is 0, go here
;; write data
LDX # hh(M_W_DATAH)
LDY zp 3
JSR a :spi16
BRA r :tryagain
;; CS low, SCLK low
spi16: LDA # %00000000
STA a PORTA
STX zp 2
STY zp 1
;; SPI output
STZ zp 4
STZ zp 3
LDX # 2
_spi_next: LDY # 8
STY zp 0
_spi_8: ASL zp,x 0
LDA # 0 ; preclear MOSI
BCC r :_spi_zout
ORA # hh(M_DIN) ; set MOSI
_spi_zout: STA a PORTA
ORA # hh(M_SCLK) ; set SCLK
STA a PORTA
LDY a PORTA ; DOUT on bit 7
CLC i ; preclear MISO
BPL r :_spi_zin ;
SEC i ; set MISO
_spi_zin: ROL zp,x 2
AND # hh(~M_SCLK & 0xff) ; clear SCLK
STA a PORTA
DEC zp 0
BNE r :_spi_8
DEX i
BNE r :_spi_next
;; CS high, SCLK low
LDA # hh(M_CS)
STA a PORTA
RTS s