include(`common.m4')

define(KBD_STATE, 0x40) ;;; 0x40 - 0x7f
define(KBD_STATE2, 0x80) ;;; 0x80 - 0xbf

        BRA r :reset ; RESB
        NOP i        ; IRQ

reset:  LDX # ff
        TXS i

        JSR a :lcd_init

        ;; LDA # 61
        ;; JSR a :lcd_w_rs1

        LDA # %11111111
        STA a VIA1_PORTA

        LDA # %00000000
        STA a VIA1_DDRB

        LDA # %11111111
        STA a VIA1_DDRA


        LDX # 80
        LDA # 0
_state: STA zp,x hh(KBD_STATE)
        DEX i
        BNE r :_state


loop:   LDX # 7         ; state
        LDA # %01111111
        STA zp 0

loop0:  LDA zp 0
        STA a VIA1_PORTA

                LDY # 4         ; bit
                LDA a VIA1_PORTB
loop1:          ROR A
                PHA s           ; [A]
                PHP s           ; [P,A]
                ;; (X * 8 + Y) * 2
                        TXA i
                        ASL A
                        ASL A
                        ASL A
                        CLC i
                        STY zp 1
                        ADC zp 1
                ;;

                PLP s           ; [A]
                PHX s           ; [X,A]
                TAX i
                BCS r :_kbd_up

;;; down
_kbd_down:      LDA zp,x hh(KBD_STATE)
                CMP # 4
                BNE r :_kbd_state_inc

        ;; if (kbd_state == 0)
                LDA a,x hh(KBD_STATE2)
                BNE r :_loop1_resume

                INC a,x hh(KBD_STATE2)

                LDA a,x :_bin_keymap_start
                JSR a :kbd_char

                BRA r :_loop1_resume
        ;; }

_kbd_state_inc: INC zp,x hh(KBD_STATE)
                BRA r :_loop1_resume

;;; end down

_kbd_up:        LDA zp,x hh(KBD_STATE)
                BEQ r :_kbd_up_state2

_kbd_state_dec: DEC zp,x hh(KBD_STATE)
                BRA r :_loop1_resume

_kbd_up_state2: STZ a,x hh(KBD_STATE2)

_loop1_resume:  PLX s           ; [A]
                PLA s           ; []
                DEY i
                BPL r :loop1

        SEC i
        ROR zp 0
        DEX i
        BPL r :loop0

        BRA r :loop

;;; kbd char
kbd_char:       CMP # 30
                BEQ r :_backspace

                JSR a :lcd_w_rs1
                RTS s

                ;;     CL
                ;; 0001SRxx
_backspace:     LDA a %00010000
                JSR a :lcd_w_rs0
                RTS s

;;; end kbd_char