From f15eca7ea1f295eb09057bff66d929259965ab8c Mon Sep 17 00:00:00 2001
From: Zack Buhman <zack@buhman.org>
Date: Sun, 3 Apr 2022 15:53:57 -0700
Subject: [PATCH] add timer LED blink demo

---
 .gitignore   |  1 +
 Makefile     |  4 +++-
 common.m4    | 27 ++++++++++++++++++++++
 face.asm.in  | 41 ++++++++++-----------------------
 timer.asm.in | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 107 insertions(+), 30 deletions(-)
 create mode 100644 common.m4
 create mode 100644 timer.asm.in

diff --git a/.gitignore b/.gitignore
index 237ac1e..a930983 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,2 +1,3 @@
 *.bin
 *.rom
+*.asm
diff --git a/Makefile b/Makefile
index 9a0c747..620bcb2 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,8 @@
 HOME = /home/buhman
 
-%.asm: %.asm.in
+all:
+
+%.asm: %.asm.in common.m4
 	m4 < $< > $@
 
 %.bin: %.asm
diff --git a/common.m4 b/common.m4
new file mode 100644
index 0000000..b425f4d
--- /dev/null
+++ b/common.m4
@@ -0,0 +1,27 @@
+changecom(`@')dnl
+dnl
+define(PORTB, 8000)dnl
+define(PORTA, 8001)dnl
+define(DDRB, 8002)dnl
+define(DDRA, 8003)dnl
+define(T1CL, 8004)dnl
+define(T1CH, 8005)dnl
+define(T1LL, 8006)dnl
+define(T1LH, 8007)dnl
+define(T2CL, 8008)dnl
+define(T2CH, 8009)dnl
+define(SR, 800a)dnl
+define(ACR, 800b)dnl
+define(PCR, 800c)dnl
+define(IFR, 800d)dnl
+define(IER, 800e)dnl
+dnl
+define(`L_CGRAM', `0b01000000')dnl
+define(`L_DDRAM', `0b10000000')dnl
+dnl
+define(`L_E', `0b001')dnl
+define(`L_RS', `0b010')dnl
+define(`L_RW', `0b100')dnl
+dnl
+define(`hh', `eval($1, 16)')dnl
+define(`bh', `eval(0b$1, 16)')dnl
diff --git a/face.asm.in b/face.asm.in
index 55492be..3eea2d8 100644
--- a/face.asm.in
+++ b/face.asm.in
@@ -1,56 +1,39 @@
 ; -*-asm-*-
-
-changecom(`@')
-
-;; VIA: 8000
-define(PORTB, h8000)
-define(PORTA, h8001)
-define(DDRB, h8002)
-define(DDRA, h8003)
-
-define(`L_CGRAM', `0b01000000')
-define(`L_DDRAM', `0b10000000')
-
-define(`L_E', `0b001')
-define(`L_RS', `0b010')
-define(`L_RW', `0b100')
-
-define(`hh', `eval($1, 16)')
-define(`bh', `eval(0b$1, 16)')
+include(`common.m4')
 
         ;; reset stack
 reset:  LDX # ff
         TXS i
 
         ;; Set pins 0-2 on Port A to Output
-        LDA # bh(00000111)
+        LDA # %00000111
         STA a DDRA
 
         ;; Function Set:
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   0   0   1   B   L   F   x   x
         ;; (Bits 8/4, Lines 2/1, Font 5x11/5x8)
-        LDA # bh(00111000)
+        LDA # %00111000
         JSR a :lcd-w-rs0
 
         ;; Display ON/OFF:
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   0   0   0   0   0   D   C   B
         ;; (Display, Cursor, Blink)
-        LDA # bh(00001110)
+        LDA # %00001110
         JSR a :lcd-w-rs0
 
         ;; Clear Display:
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   0   0   0   0   0   0   0   1
-        LDA # bh(00000001)
+        LDA # %00000001
         JSR a :lcd-w-rs0
 
         ;; Entry Mode Set:
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   0   0   0   0   0   1 I/D   S
         ;; (Increment/Decrement, Shift)
-        LDA # bh(00000110)
+        LDA # %00000110
         JSR a :lcd-w-rs0
 
         ;; Set DDRAM Address:
@@ -105,7 +88,7 @@ loop:   LDA (zp),y 00
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   0   0   0   0   0   D   C   B
         ;; (Display, Cursor, Blink)
-        LDA # bh(00001100)
+        LDA # %00001100
         JSR a :lcd-w-rs0
 
         ;; Set CGRAM Address
@@ -117,7 +100,7 @@ loop2:  LDA # hh(L_CGRAM|9)
         ;; Write Data to CGRAM
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   D   D   D   D   D   D   D   D
-        LDA # bh(00110)
+        LDA # %00110
         JSR a :lcd-w-rs1
 
         ;; Set CGRAM Address
@@ -129,7 +112,7 @@ loop2:  LDA # hh(L_CGRAM|9)
         ;; Write Data to CGRAM
         ;;  D7  D6  D5  D4  D3  D2  D1  D0
         ;;   D   D   D   D   D   D   D   D
-        LDA # bh(00000)
+        LDA # %00000
         JSR a :lcd-w-rs1
 
         JMP a :loop2
@@ -164,7 +147,7 @@ lcd-w-rs1:      JSR a :lcd-wait
         ;; wait BF
 lcd-wait:       PHA s
 
-                LDA # bh(00000000)  ;; Set pins 0-7 on Port B to Input
+                LDA # %00000000  ;; Set pins 0-7 on Port B to Input
                 STA a DDRB
 
 _lcd_wait:      LDA # hh(L_RW)
@@ -172,13 +155,13 @@ _lcd_wait:      LDA # hh(L_RW)
                 LDA # hh(L_E|L_RW)
                 STA a PORTA
                 LDA a PORTB
-                AND # bh(10000000)
+                AND # %10000000
                 BNE r :_lcd_wait
 
                 LDA # hh(L_RW)
                 STA a PORTA
 
-                LDA # bh(11111111)  ;; Set pins 0-7 on Port B to Output
+                LDA # %11111111  ;; Set pins 0-7 on Port B to Output
                 STA a DDRB
 
                 PLA s
diff --git a/timer.asm.in b/timer.asm.in
new file mode 100644
index 0000000..be5645d
--- /dev/null
+++ b/timer.asm.in
@@ -0,0 +1,64 @@
+; -*-asm-*-
+include(`common.m4')
+
+define(ticks_, 00)
+
+        BRA r :reset
+        BRA r :irq
+
+;;; begin irq
+irq:    PHA s
+
+        LDA a T1CL
+        DEC zp ticks_
+
+        PLA s
+        RTI s
+;;; end irq
+
+
+reset:  LDX # ff
+        TXS i
+
+        LDA # %10000000  ;; Set pins 0-7 on Port B to Output
+        STA a DDRA
+
+        JSR a :continuous
+
+count:  LDA # 25
+        STA zp ticks_
+
+loop:   LDA zp ticks_
+        BPL r :loop
+        LDA # %10000000
+        EOR a PORTA
+        STA a PORTA
+        BRA r :count
+
+
+;;; begin continuous
+continuous:     LDA # %01000000
+                STA a ACR
+                LDA # 0e
+                STA a T1CL
+                LDA # 27
+                STA a T1CH
+                LDA # %11000000
+                STA a IER
+                CLI i
+                RTS s
+;;; end continuous
+
+
+;;; begin oneshot
+oneshot:        LDA # %00000000
+                STA a ACR
+                LDA # 50
+                STA a T1CL
+                LDA # c3
+                STA a T1CH
+_oneshot:       BIT a IFR
+                BVC r :_oneshot ; IFR[6]==0
+                LDA a T1CL    ; clear IFR[6]
+                RTS s
+;;; end oneshot